National semiconductor DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display handbook

The DS90CF383 is a +3.3V LVDS transmitter from National Semiconductor Corporation that supports a 24-bit Flat Panel Display (FPD) Link, and uses a 65 MHz transmit clock to sample 28 bits of input data per cycle and transmit it at a rate of 455 Mbps per LVDS data channel.


National semiconductor DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display handbook - cover page
Brand
National Semiconductor
Category
Monitor
Document type
Datasheet
Language
English
Pages
9
File format
PDF
File size
220 KB
Published
04 July, 2012
Updated
30 September, 2023
MD5 checksum
8F78183F76F60F8BD8DBA3A8FABF0838

About this manual

The DS90CF383 is a +3.3V LVDS transmitter designed for 24-bit Flat Panel Display (FPD) links operating at 65 MHz. It converts 28 bits of CMOS/TTL input data into four LVDS data streams, with a phase-locked transmit clock transmitted in parallel over a fifth LVDS link. At 65 MHz, it transmits 24 bits of RGB data and 3 bits of LCD timing and control data at a rate of 455 Mbps per channel, achieving a total data throughput of 227 Mbytes/sec.

What's inside

  • General Description
  • Absolute Maximum Ratings
  • Electrical Characteristics
  • Transmitter Switching Characteristics
  • AC Timing Diagrams
  • Pin Description
  • Applications Information
  • Physical Dimensions

Specifications

Supply Voltage3.0V to 3.6V
Operating Temperature-40°C to +85°C
Clock Frequency20 to 65 MHz
Data Throughput227 Mbytes/sec
Package Type56-lead TSSOP
ESD Rating>7k V

Frequently asked questions

What is the maximum clock frequency supported?

The device supports shift clock frequencies from 20 MHz to 65 MHz.

What is the total data throughput at 65 MHz?

Using a 65 MHz clock, the data throughput is 227 Mbytes/sec.

Is the device compatible with 5V systems?

No, the input and control inputs accept 3.3V TTL/CMOS levels and are not 5V tolerant.

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