DS90CF386/DS90CF366 is a LVDS receiver chip produced by TI company. It can convert four LVDS data streams (up to 2.38 Gbps throughput or 297.5 megabytes/second bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL)
The DS90CF386 and DS90CF366 are +3.3V LVDS receivers designed to convert LVDS data streams into parallel CMOS/TTL data for Flat Panel Display (FPD) links operating up to 85 MHz. The DS90CF386 handles 24-bit data (24 bits RGB + 4 bits control), while the DS90CF366 handles 18-bit data (18 bits RGB + 3 bits control). Both devices support shift clock frequencies from 20 to 85 MHz and are compatible with the TIA/EIA-644 LVDS standard.
| Shift Clock Support | 20 to 85 MHz |
|---|---|
| Typical Power Consumption | <142 mW @85MHz |
| Power-down Mode Current | <1.44 mW (max) |
| ESD Rating (HBM) | >7 kV |
| Supply Voltage | 3.0V to 3.6V |
| Operating Temperature | -10°C to +70°C |
| Package Types | 56-lead TSSOP, 48-lead TSSOP, 64-ball FBGA |
| Data Output Type | Falling edge strobe |
The receivers support shift clock frequencies up to 85 MHz.
No, the PLL requires no external components.
The chipset is compatible with the TIA/EIA-644 LVDS standard.