Intersil X5043/X5045 CPU Supervisor Data Sheet

The X5043, X5045 is a 4K, 512 x 8 Bit CPU Supervisor with 4K SPI EEPROM produced by Intersil. It has functions such as Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory.


Intersil X5043/X5045 CPU Supervisor Data Sheet - cover page
Brand
Intersil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
21
File format
PDF
File size
393 KB
Published
11 June, 2012
Updated
30 September, 2023
MD5 checksum
56079A540B9924915BD0E467B81B87CB

About this manual

The Intersil X5043 and X5045 are CPU Supervisor devices that integrate four popular functions into a single package to lower system cost and reduce board space. These functions include Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory.

Applying power activates the power-on reset circuit, holding the RESET signal active until the power supply and oscillator stabilize. The device also features a low Vcc detection circuitry that resets the system if voltage falls below the minimum trip point. Additionally, an independent Watchdog Timer provides protection for microcontrollers by asserting the reset signal if the user fails to restart the timer within a selectable interval.

What's inside

  • Features
  • Applications
  • Ordering Information
  • Pin Configuration
  • Principles of Operation
  • Typical Application

Frequently asked questions

What is the minimum endurance and data retention for the EEPROM memory?

The device provides a minimum endurance of 100,000 cycles and a minimum data retention of 100 years.

What is the maximum write cycle time for the device?

The typical write cycle time is 5ms.

What is the maximum standby current when the watchdog timer is enabled?

The maximum standby current is less than 50uA when the watchdog is on.

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