Cypress Semiconductor CY7B131 Dual-Port Static RAM Datasheet


Cypress Semiconductor CY7B131 Dual-Port Static RAM Datasheet - cover page
Brand
Cypress
Category
Memory
Document type
Datasheet
Language
English
Pages
14
File format
PDF
File size
437 KB
Published
07 June, 2012
Updated
27 July, 2012
MD5 checksum
AD4C82D77B7EDECD709E80B23E035D10

About this manual

The document describes the CY7B131 and its companion device, the CY7B141. These are high-speed BiCMOS 1K by 8 dual-port static RAMs available in a 52-lead PLCC package. The devices feature fully asynchronous operation with independent control pins for each port, including Chip Enable (CE), Write Enable (R/W), and Output Enable (OE). They include BUSY output flags to indicate when ports are accessing the same memory location and an Interrupt flag (INT) for specific address conditions.

What's inside

  • Features
  • Functional Description
  • Pin Configuration
  • Maximum Ratings
  • Electrical Characteristics
  • Switching Characteristics
  • AC Test Loads
  • Switching Waveforms

Specifications

Memory Size1K x 8 bits
Package Type52-lead PLCC
Maximum Access Time (CY7B131-15)15 ns
Operating Temperature (Commercial)0°C to +70°C

Frequently asked questions

Can the CY7B131 be used as a master device?

Yes, it can be utilized as either a standalone RAM or as a MASTER dual-port RAM in conjunction with the CY7B141 SLAVE.

What is the function of the BUSY flag?

The BUSY signal indicates that the port is trying to access the same memory location currently being accessed by the other port.

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