The W152 is an eight-output zero delay buffer designed to work with SSFTG reference signals. It features two banks of four outputs each and provides division options to halve, double, or quadruple the reference frequency.
The W152 is an eight-output zero delay buffer featuring two banks of four outputs each. It utilizes a Phase-Locked Loop (PLL) to synchronize outputs with a reference input, supporting configurations to halve, double, or quadruple the reference frequency. The device is specifically designed to work with SSFTG reference signals without filtering out the spread spectrum feature.
| Operating Voltage | 3.3V ±10% |
|---|---|
| Operating Temperature Range | 0 to +70 °C |
| Input Frequency Range | 15 to 140 MHz |
| Output Frequency Range | 15 to 140 MHz |
| Cycle-to-Cycle Jitter | 225 ps |
| Output to Output Skew (Between Banks) | 215 ps |
| Output to Output Skew (Within Banks) | 100 ps |
| Package Types | 16-pin SOIC, 16-pin TSSOP |
The W152 is an eight-output zero delay buffer that uses a PLL to provide eight copies of a time-varying signal synchronized to a reference input.
Yes, by setting the logic inputs SEL0 and SEL1 to 1 and 0, the device bypasses the PLL and acts as a standard eight-output clock driver.
The device offers options to halve, double, or quadruple the reference frequency, depending on the feedback signal connected to the FBIN pin.