The M30201 group of single-chip microcomputers are built using the high-performance silicon gate CMOS process using a M16C/60 Series CPU core. M30201 group is packaged in a 52-pin plastic molded SDIP, or 56-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated instructions featuring a high level of instruction efficiency. With 1M bytes of address space, they are capable of execut- ing instructions at high speed. The M30201 group includes a wide range of products with different internal memory types and sizes and various package types.
The M30201 group consists of single-chip microcomputers built using a high-performance silicon gate CMOS process with an M16C/60 Series CPU core. These devices are available in 52-pin SDIP and 56-pin QFP packages and support both mask ROM and flash memory versions.
| Shortest instruction execution time | 100ns (f(XIN)=10MHz) |
|---|---|
| Supply voltage (mask ROM, 10MHz) | 4.0 to 5.5V |
| Supply voltage (flash memory, 10MHz) | 4.0 to 5.5V |
| Number of basic instructions | 91 instructions |
| I/O port lines | 43 lines |
| A-D converter resolution and channels | 10 bits x 8 channels |
The shortest instruction execution time is 100ns when the clock frequency is 10MHz.
The microcomputer has 9 internal and 3 external interrupt sources plus 4 software sources.