ispLSI ® 2032E is a high-performance, high-density, high-speed, small programmable logic device (PLD) that provides 1000 PLD gates, 32 I/O pins, 32 registers and high-speed global interconnect. The device also features wide input gating, small logic block size, high-performance E2CMOS technology, programmable logic core, IEEE 1149.1 (JTAG) test interface, 3.3V or 5V I/O, PCI compatible output, open-drain output option, electrically erasable and reprogrammable, non-volatile and unused device terminal shutdown saves power.
The Lattice ispLSI 2032E is a high-density in-system programmable logic device featuring 1000 PLD gates, 32 I/O pins, and 32 registers. It utilizes SuperFAST High Density technology with a maximum operating frequency of 225 MHz and is fully functionally compatible with ispLSI 2032 devices. The device supports 5V logic cores with optional 3.3V or 5V I/O on 48-pin packages, enabling mixed-voltage system designs.
| Maximum Operating Frequency | 225 MHz |
|---|---|
| Propagation Delay | 3.5 ns |
| Number of Registers | 32 |
| Number of I/O Pins | 32 |
| Number of PLD Gates | 1000 |
| Erase/Reprogram Cycles | 10,000 |
| Supply Voltage (Logic Core) | 5V |
Yes, it is 100% functionally and JEDEC upward compatible with ispLSI 2032 devices.
Yes, it supports ispJTAG in-system programming via IEEE 1149.1 (JTAG) Test Access Port.
Yes, user-selectable 3.3V or 5V I/O is available, but only for the 48-pin package.