The MAX9153 and MAX9154 are low‑jitter, low‑voltage differential signaling repeaters designed for high‑speed data or clock distribution while minimizing power, space, and noise. The MAX9153 accepts an LVDS input, while the MAX9154 accepts an LVPECL input, and both provide ten LVDS outputs with 100 Ω differential drive.
Key features include ultra‑low deterministic jitter (90 ps p‑p max), random jitter (1 ps RMS max), channel‑to‑channel skew under 60 ps, and a fail‑safe circuit that forces outputs high when inputs are undriven, open, terminated, or shorted. The devices operate from a single +3.3 V supply and are specified for –40 °C to +85 °C operation.
| Maximum data rate | 800 Mbps |
|---|---|
| Deterministic jitter (max) | 90 ps p‑p |
| Random jitter (max) | 1 ps RMS |
| Channel‑to‑channel skew (max) | 60 ps |
| Supply current at 800 Mbps | 118 mA |
| Power‑down supply current | 2 µA |
| Operating temperature range | -40 °C to +85 °C |
| Package | 28‑pin TSSOP |
| Input type | LVDS (MAX9153) or LVPECL (MAX9154) |
| Output drive impedance | 100 Ω differential |
The devices support up to 800 Mbps data rate.
They draw 118 mA at 800 Mbps.
In power‑down mode the current drops to 2 µA.