The ASM5I9658 is a 3.3V compatible, 1:10 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications. With output frequencies up to 250MHz and output skews less than 120pS, the device meets the needs of the most demanding clock applications.
The ASM519658 is a 3.3 V compatible, 1:10 PLL‑based clock generator and zero‑delay buffer designed for telecom, networking and computing applications. It provides up to 20 clock outputs, each capable of driving terminated 50 Ω transmission lines, and supports differential LVPECL reference input and external PLL feedback.
The device is supplied in 32‑lead LQFP/TQFP packages, operates from –65 °C to 125 °C, and requires no external loop‑filter components. Detailed electrical characteristics, pin configurations, and application notes are provided for designers.
| Supply Voltage | 3.3 V |
|---|---|
| Maximum Output Frequency | 250 MHz |
| Maximum Output Skew | 120 ps |
| Number of Clock Outputs | 20 (effective fan‑out 1:16) |
| Package | 32‑lead LQFP / TQFP |
| Operating Temperature Range | -65 °C to 125 °C |
| Input High Voltage (LVPECL) | 2.0 V |
| Input Low Voltage (LVPECL) | 0.8 V |
| Output High Voltage (LVCMOS) | 2.4 V |
| Output Low Voltage (LVCMOS) | 0.55 V |
The device can generate clock signals up to 250 MHz.
It operates from a 3.3 V power supply.
It can drive up to 20 clock lines, providing an effective fan‑out of 1:16.
The maximum output skew is specified as 120 ps.