Key facts
- Model
- ASM5I9658
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-05
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User ManualAlliance Semiconductor ASM5I9658 3.3V 1:10 LVCMOS PLL Clock Generator
Alliance Semiconductor ASM5I9658 3.3V 1:10 LVCMOS PLL Clock Generator
User Manual
The ASM5I9658 is a 3.3V compatible, 1:10 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications.
Read onlineAlliance Semiconductor ASM5I9658 specifications
| Supply Voltage | 3.3 V |
|---|---|
| Maximum Output Frequency | 250 MHz |
| Maximum Output Skew | 120 ps |
| Number of Clock Outputs | 20 (effective fan‑out 1:16) |
| Package | 32‑lead LQFP / TQFP |
| Operating Temperature Range | -65 °C to 125 °C |
| Input High Voltage (LVPECL) | 2.0 V |
| Input Low Voltage (LVPECL) | 0.8 V |
| Output High Voltage (LVCMOS) | 2.4 V |
| Output Low Voltage (LVCMOS) | 0.55 V |
Source: Alliance Semiconductor ASM5I9658
All Alliance Semiconductor ASM5I9658 documents by type
User Manual 2
Day-to-day operation, settings and troubleshooting. Start here if the product is already set up.
Datasheet 1
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the maximum clock frequency the ASM519658 can generate?
The device can generate clock signals up to 250 MHz.
What supply voltage does the ASM519658 require?
It operates from a 3.3 V power supply.