FREESCALE SEMICONDUCTOR MC9S08GT16A/MC9S08GT8A HCS08 Microcontrollers handbook

MC9S08GT16A and MC9S08GT8A are Freescale's 8-bit HCS08 microcontrollers, with a main frequency of 40MHz and support for 32 interrupt/reset sources.


FREESCALE SEMICONDUCTOR MC9S08GT16A/MC9S08GT8A HCS08 Microcontrollers handbook - cover page
Brand
Freescale
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
283
File format
PDF
File size
1.6 MB
Published
07 April, 2012
Updated
01 October, 2023
Model
HCS08
MD5 checksum
A79F0B7747FB733464C1778C3F1EE367

About this manual

The MC9S08GT16A and MC9S08GT8A are 8‑bit HCS08 microcontrollers offering up to 40 MHz CPU speed, flexible clock sources, and a rich set of on‑chip peripherals. They target low‑power applications and provide extensive development support such as background debugging and on‑chip ICE.

The document covers device overview, pin assignments, operating modes, memory architecture, reset and interrupt handling, I/O configuration, peripheral modules (ADC, SCI, SPI, I2C, timers, PWM, keyboard interrupt), clock generator options, electrical characteristics, and ordering information for the various package options.

What's inside

  • Device Overview
  • Pins and Connections
  • Modes of Operation
  • Memory
  • Resets, Interrupts, and System Configuration
  • Parallel Input/Output
  • Keyboard Interrupt
  • Central Processor Unit
  • Internal Clock Generator
  • Timer/PWM

Specifications

CPU frequency40 MHz
Flash memory sizeUp to 16 KB
RAM sizeUp to 2 KB
High‑current I/O pins8 pins, 20 mA each
General‑purpose I/O pinsUp to 38 GPIO pins plus one output‑only pin
ADC channels8‑channel, 10‑bit

Frequently asked questions

How many general‑purpose I/O pins does the microcontroller provide?

It provides up to 38 general‑purpose I/O pins, plus one output‑only pin, depending on the package.

What clock source options are available for the MC9S08GT16A/GT8A?

The microcontroller supports internal, external, crystal, or resonator clock sources, with a hardware frequency‑locked loop (FLL) for frequency synthesis.

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