The SPP1413A is a P-Channel enhancement mode MOSFET power field effect transistor produced using high cell density DMOS trench technology. These devices are particularly suited for low voltage applications such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching and low in-line power loss are needed.
The SPP1413A is a P‑Channel logic enhancement mode MOSFET built with a high‑density DMOS trench process. It offers very low on‑state resistance and is suited for low‑voltage power‑management applications such as cellular phones, notebook computers, and other battery‑powered circuits where high‑side switching and minimal power loss are required.
The datasheet lists key ratings including a -20 V drain‑source voltage, +12 V gate‑source voltage, up to -6 A pulsed drain current, and typical on‑resistance as low as 0.130 Ω. The device is supplied in a compact SOT‑353 (SC‑70) surface‑mount package and includes detailed pin descriptions, ordering information, and thermal characteristics.
| Drain‑Source Voltage (V_DSS) | -20 V |
|---|---|
| Gate‑Source Voltage (V_GSS) | +12 V |
| Pulsed Drain Current (I_pM) | -6 A |
| Continuous Drain Current (I_D) @ 150 °C | -1.7 A |
| Total Gate Charge (Q_g) | 4.8 nC |
| Input Capacitance (C_iss) | 485 pF |
| Thermal Resistance Junction‑to‑Ambient (R_θJA) | 105 °C/W |
The maximum drain‑source voltage is -20 V.
It is supplied in an SOT‑353 (SC‑70) surface‑mount package.
The total gate charge is 4.8 nC.