This document describes the features and characteristics of the SPW32N50C3 Cool MOS™ power transistor, including new revolutionary high voltage technology, ultra low gate charge, periodic avalanche rating, extreme dv/dt rating, ultra low effective capacitances, and improved transconductance.
The SPW32N50C3 is a 560 V, 32 A Cool MOS power transistor presented by Infineon Technologies. The document provides detailed electrical and thermal specifications, maximum ratings, and characteristic curves for design and application use.
Key sections cover maximum ratings, thermal resistance values, electrical parameters such as on‑state resistance and gate charge, as well as typical output and transfer characteristics. Package dimensions and ordering codes are also listed.
| Drain‑Source Breakdown Voltage (Vds) | 500 V |
|---|---|
| Continuous Drain Current (Id) at 25 °C | 32 A |
| Pulsed Drain Current (Id(p)) | 96 A |
| Power Dissipation (Pd) at 25 °C | 284 W |
| On‑State Resistance (Rds(on)) typ at 25 °C | 0.09 Ω |
| Input Capacitance (Ciss) | 4200 pF |
| Gate Charge Total (Qg) | 170 nC |
| Thermal Resistance Junction‑to‑Case | 0.44 K/W |
The maximum continuous drain current at 25 °C is 32 A.
The drain‑source breakdown voltage is rated at 500 V.
It can dissipate up to 284 W at a case temperature of 25 °C.
The typical on‑state resistance at 25 °C is 0.09 Ω.