The K4S280432M is a 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits, fabricated with SAMSUNG′s high performance CMOS technol- ogy.
This document describes the Samsung K4S280432M 128 Mbit CMOS SDRAM, a synchronous DRAM organized as 8M × 4 bit × 4 banks. It includes features such as JEDEC‑standard 3.3 V operation, selectable CAS latency, and programmable burst lengths.
The datasheet contains ordering information, functional block diagrams, pin layouts, absolute maximum ratings, DC and AC operating conditions, IBIS specifications, and a simplified truth table for command timing.
| Capacity | 128 Mbit |
|---|---|
| Organization | 8M × 4 bit × 4 banks |
| Supply voltage (Vob, VDDQ) | 3.0 V min / 3.3 V typ / 3.6 V max |
| CAS latency options | 2 or 3 |
| Burst length options | 1, 2, 4, or 8 |
| Maximum operating frequency | 125 MHz (CL=3) |
| Storage temperature range | -55 °C to +150 °C |
The device operates with a supply voltage of 3.0 V minimum, 3.3 V typical, and 3.6 V maximum.
The SDRAM supports CAS latency values of 2 or 3.
The part can run up to 125 MHz when configured for CL = 3.