This document describes the features and characteristics of the K4S280432B CMOS SDRAM product released by Samsung Electronics in August 1999. The product is a synchronous high data rate dynamic random access memory with a capacity of 128Mbit, fabricated using Samsung's high-performance CMOS technology. It has programmable operating frequencies, burst lengths, and latencies, making it suitable for various high-bandwidth, high-performance memory system applications.
The K4S280432B is a 128‑Mbit CMOS synchronous DRAM organized as 8M × 4‑bit × 4 banks and compatible with LVTTL interfaces. It operates from a 3.3 V supply and supports CAS latencies of 2 or 3, burst lengths of 1, 2, 4, or 8, and both sequential and interleaved burst types.
The datasheet provides absolute maximum ratings, recommended DC and AC operating conditions, pin‑out details, timing parameters, and IBIS specifications for use in high‑performance memory applications.
| Capacity | 128 Mbit |
|---|---|
| Organization | 8M × 4‑bit × 4 banks |
| Supply voltage (typical) | 3.3 V |
| Maximum operating frequency | 133 MHz (CL=3) |
| CAS latency options | 2 or 3 |
| Burst length options | 1, 2, 4, 8 |
| Storage temperature range | -55 °C – +150 °C |
The device operates from 3.0 V (minimum) to 3.6 V (maximum) with a typical value of 3.3 V.
Up to 133 MHz when configured with CAS latency 3.
The SDRAM supports CAS latency values of 2 and 3.