This document is the specification of K4S1G0732B
The K4S1G0732B is a 1,073,741,824‑bit (1 Gb) synchronous DRAM organized as 32 M × 8 bit × 4 banks. It follows JEDEC standard 3.3 V power supply and supports CAS latencies of 2 and 3, burst lengths of 1, 2, 4, and 8, and both sequential and interleaved burst types.
The device is supplied in a 54‑pin TSOPIII package, operates up to 133 MHz, and is rated for a storage temperature range of –55 °C to +150 °C. Absolute maximum ratings, DC/AC operating conditions, pin configuration, and timing parameters are detailed in the document.
| Capacity | 1 Gb (1,073,741,824 bits) |
|---|---|
| Organization | 32 M × 8 bit × 4 banks |
| Supply Voltage (typical) | 3.3 V |
| Maximum Operating Frequency | 133 MHz |
| Package Type | 54‑pin TSOPIII |
| Refresh Period | 64 ms (8K cycles) |
| CAS Latency | 2, 3 |
| Burst Lengths | 1, 2, 4, 8 |
The typical supply voltage is 3.3 V.
It can operate up to 133 MHz.
It is supplied in a 54‑pin TSOPIII package.