Specification sheet for Xilinx Spartan and Spartan‑XL FPGA families covering features, logic capacity, I/O options and performance.
The Spartan and Spartan‑XL families are high‑volume FPGA solutions offering up to 40 000 system gates, on‑chip RAM, and performance beyond 80 MHz. They are available in both 5 V and 3.3 V versions and support a wide range of I/O standards.
The devices use configurable logic blocks (CLBs) with multiple lookup tables, flip‑flops, and optional latches (Spartan‑XL). Features include fast carry logic, programmable I/O thresholds, optional VCC clamping, and output drive of 12 mA or 24 mA. Detailed specifications are listed for each device density.
| Maximum Logic Cells | 1862 |
|---|---|
| Maximum System Gates | 40,000 |
| Flip‑Flops per CLB | 2 |
| Supported Supply Voltages | 5 V and 3.3 V |
| Output Drive Current | 12 mA or 24 mA |
| Maximum System Clock Rate | >80 MHz |
| Internal Performance | >150 MHz |
The Spartan family provides up to 1,862 logic cells.
Both 5 V and 3.3 V versions are available.
Spartan‑XL outputs can be programmed for 12 mA or 24 mA drive.
They can operate at clock rates exceeding 80 MHz.