Xilinx ISE Schematic Entry Tutorial

About this manual

This document serves as a tutorial for using Xilinx ISE for schematic entry and Modelsim for simulation. It guides users through the basics of circuit simulation, design entry options, and the specific tool flow required to create schematics and simulate designs. The guide focuses on using the Xilinx Schematic Editor and a Verilog Test Fixture within the Modelsim Simulator.

What's inside

• Introduction to Xilinx ISE Project Navigator
• Setting up the Xilinx Tools
• Creating a New Project
• Choosing Device Properties
• Getting to Know the Project Navigator
• Simulation Using Verilog Test Fixture
• Creating Hierarchical Designs
• Implementing and Downloading to Nexys2

Frequently asked questions

Which FPGA device family does this tutorial use?

The tutorial uses the Spartan3E Family.

What tool is used to download the design to the board?

The Adept tool is used to download the bit file.