The PI6C2305-1 is a 3.3V zero-delay buffer designed to distribute clock signals in applications including PC, workstation, datacom, telecom, and high-performance systems. The device provides 5 copies of clocks that have less than 350ps propagation delay compared to a reference clock. The skew among the output clock signals for PI6C2305-1 is less than 250ps. When there are no rising edges on the REF input, the PI6C2305-1 enters a power-down state. In this mode, the PLL is off and all outputs are three-stated. This results in less than 50µA of current draw. The PI6C2305-1H is the high-drive version of the PI6C2305-1, featuring faster rise and fall times.