Pericom PI6C2302 Phase-Locked Loop Clock Driver Datasheet

The document is an introduction to a product, including its connection methods, power requirements, and functional features.


Pericom PI6C2302 Phase-Locked Loop Clock Driver Datasheet - cover page
Brand
Pericom
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
5
File format
PDF
File size
230 KB
Published
06 August, 2012
Updated
29 September, 2023
MD5 checksum
68FCAD36CB64E798BDF430E4330049D7

About this manual

The Pericom PI6C2302 is a low-skew, low-jitter Phase-Locked Loop (PLL) clock driver designed for networking and synchronous DRAM modules in server and workstation applications. It features a 2x multiplication ratio where one input generates two outputs with nearly zero propagation delay from the CLK_IN to any clock output.

What's inside

  • Product Features
  • Application
  • Logic Block Diagram
  • Pin Functions
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Electrical Characteristics
  • AC Specifications
  • Package Information

Specifications

Supply Voltage (Commercial)3.0V to 3.6V
Operating Temperature (Industrial)-40°C to +85°C
Max Clock Frequency (Commercial)134 MHz
Cycle-to-Cycle Jitter+/- 100ps max.
Output Multiplication2X CLK_IN on CLK_OUT

Frequently asked questions

What is the maximum clock frequency for commercial operation?

The maximum clock frequency for commercial operation is 134 MHz.

How does the device handle input-to-output delay?

By connecting the feedback CLK_OUT output to the FB_IN input, the propagation delay from the CLK_IN input to any clock output will be nearly zero.

What is the maximum DC output current?

The maximum DC output current is 100 mA.

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