PI6C20800S is a PCI Express, high-speed, low-noise differential clock buffer designed to be a companion to PI6C410BS PCI Express clock generator for Intel server chipsets. The device distributes the differential SRC clock from PI6C410BS to eight differential pairs of clock outputs either with or without PLL. The input SRC clock can be divided by 2 when SRC_DIV# is LOW. The clock outputs are controlled by input selection of SRC_STOP#, PWRDWN# and SMBus, SCLK and SDA. When input of either SRC_STOP# or PWRDWN# is LOW, the output clocks are Tristated. When PWRDWN# is LOW, the SDA and SCLK inputs must be Tristated.
The PI6C20800S is a PCI Express, high-speed, low-noise differential clock buffer designed to distribute the differential SRC clock from a PI6C410BS clock generator to eight differential pairs of clock outputs. It operates with or without a PLL and supports programmable PLL bandwidth and power management control via SMBus.
| Supply Voltage | 3.3V |
|---|---|
| Output Skew | < 50ps |
| Cycle-to-cycle Jitter | < 50ps |
| Clock Outputs | Eight Pairs |
| Input Frequency (PLL Mode) | 100 MHz |
| Input Frequency (Bypass Mode) | 100 to 400 MHz |
| Package Options | 48-Pin SSOP, 48-Pin TSSOP |
When PWRDWN# is LOW, the output clocks are Tristated, and the SDA and SCLK inputs must also be Tristated.
The device operates within an ambient temperature range of 0 to 70 °C.
The maximum power supply current is 250 mA when the input frequency is 100 MHz.
The maximum output-to-output skew is 50 ps.