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ISSI IS41C16257/IS41LV16257 256K x 16 Dynamic RAM Datasheet
The ISSI IS41C16257 and IS41LV16257 are 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories optimized for high-speed bandwidth. These devices support Fast Page Mode allowing up to 512 random accesses within a single row with access cycle times as short as 12 ns per 16-bit word.
Read onlineISSI IS41C16257 specifications
| Capacity | 262,144 x 16-bit (4-MBIT) |
|---|---|
| Refresh Interval | 512 cycles/8 ms |
| Supply Voltage (IS41C16257) | 5V ± 10% |
| Supply Voltage (IS41LV16257) | 3.3V ± 10% |
| Operating Temperature (Commercial) | 0 to +70 °C |
| Operating Temperature (Industrial) | -40 to +85 °C |
Source: ISSI IS41C16257/IS41LV16257 256K x 16 Dynamic RAM Datasheet
All ISSI IS41C16257 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What refresh modes are supported?
The devices support RAS-Only, CAS-before-RAS (CBR), and Hidden refresh modes.
From: ISSI IS41C16257/IS41LV16257 256K x 16 Dynamic RAM Datasheet
How many address bits are required?
Each bit is uniquely addressed through 18 address bits entered nine bits at a time.
From: ISSI IS41C16257/IS41LV16257 256K x 16 Dynamic RAM Datasheet
How many refresh cycles are required per period?
To retain data, 512 refresh cycles are required in each 8 ms period.
From: ISSI IS41C16257A/IS41LV16257A 256K x 16 CMOS DRAM Datasheet
What is the minimum pause required after power-on?
An initial pause of 200 µs is required followed by a minimum of eight initialization cycles before proper device operation.
From: ISSI IS41C16257A/IS41LV16257A 256K x 16 CMOS DRAM Datasheet