Altera Cyclone V Device Family Pin Connection Guidelines

About this manual

This document serves as a preliminary guide for connecting pins on Altera Cyclone V devices. It is not a specification and should be verified against the specific device datasheet before use. The guidelines are provided under a license agreement with specific terms and conditions regarding liability and warranty.

What's inside

• Clock and PLL Pins
• Dedicated Configuration JTAG Pins
• Pin Connection Guidelines
• Disclaimer
• License Agreement

Frequently asked questions

What should be done with unused Clock and PLL pins?

Altera recommends tying them to GND or leaving them unconnected, and using Quartus II software to internally bias them if they are unconnected.

How should the MSEL pins be connected for the JTAG configuration scheme?

You must tie the MSEL pins to GND if your device is using the JTAG configuration scheme.

What resistor value is required for the nCONFIG pin in an active serial configuration scheme?

You must connect the pin through a 10-k0 resistor tied to VCCPGM.