This handbook introduces the Altera Stratix GX device, covering the device's physical characteristics, pin definitions, register descriptions, programming and debugging, etc.
This document serves as a detailed handbook for the Altera Stratix GX device family. It provides extensive information on the device's architecture, including Logic Array Blocks (LABs), Logic Elements (LEs), Digital Signal Processing (DSP) blocks, and Programmable Logic Devices (PLDs). The text details the internal structure, interconnects, memory modes, and operating modes of the logic elements.
| Product Family | Stratix GX |
|---|---|
| Copyright Year | 2006 |
The chapter covering Stratix GX Transceivers was revised in June 2006.
The part number for the DC & Switching Characteristics chapter is SGX51006-1.2.