Altera Stratix Device Handbook Volume 1

About this manual

This document serves as the primary technical reference for the Stratix FPGA family, providing detailed information on device architecture, logic array blocks, and interconnect structures. It includes comprehensive data on functional descriptions, memory modes, and various operating modes for logic elements and multi-track interconnects.

What's inside

• Stratix Device Family Data Sheet
• Stratix Architecture
• Logic Array Blocks
• Configuration & Testing
• DC & Switching Characteristics
• Reference & Ordering Information
• Power Consumption
• Timing Model
• I/O Structure
• PLLs & Clock Networks

Specifications

Frequently asked questions

When was Chapter 4 revised?

Chapter 4 was revised in January 2006.

What voltage levels must Altera devices have access to for MultiVolt I/O?

To support MultiVolt I/O, the devices require access to both 1.5-V and 2.5-V planes.

What is the part number for Chapter 4 of this handbook?

The part number listed for Chapter 4 is S51004-3.4.