This document provides pin connection guidelines for the Cyclone® IV device family. It includes information about the brand, model, features, and characteristics of the products.
The document serves as a set of recommendations for connecting external components to specific pins on Altera Cyclone IV programmable logic devices. It details requirements for global clock inputs (CLK), differential clock pairs (DIFFCLK), and PLL output terminals.
Key sections cover configuration control pins such as nCONFIG, CONF_DONE, and nSTATUS, explaining their functions during device initialization and programming modes. The guide also specifies connections required for JTAG test circuitry, including pull-up or pull-down resistor values for TCK, TMS, and TDI pins to ensure proper operation.
Connect all unused CLK or DIFFCLK pins to GND.
Connect them individually to GND through a 10-KO resistor.