Altera Stratix V E, GS, and GX Device Family Pin Connection Guidelines

About this manual

This document provides recommended pin connections for the Stratix V E, GS, and GX device family. It details how to handle dedicated high-speed clock input/output pins, dual-purpose feedback clock pins, and single-ended clock outputs.

The guidelines also cover dedicated configuration and JTAG pins, explaining their internal pull-up/down characteristics and connection requirements when unused or used with external temperature sensing devices.

What's inside

• Stratix V E, GS, and GX Device Family
• Pin Connection Guidelines
• Clock Input Pins
• Feedback Clock Output Pins
• Configuration/JTAG Pins
• Temperature Sensing Diode
• MSEL Configuration Inputs

Specifications

Frequently asked questions

How should MSEL configuration input pins be handled if unused?

These pins are internally connected through a 25-KΩ resistor to GND and must not be left floating; they should be tied to VCCPGM or GND depending on the configuration scheme.

What is the function of the TEMPDIODE pins?

They are used in conjunction with an external temperature sensing device; if not used, they should be connected directly to GND.