Fairchild AN1026 Maximum Power Enhancement Techniques for SuperSOT-6 Power MOSFETs

This paper discusses how to improve the power performance of the SuperSOTTM-6 Power MOSFET by optimizing the design of copper mounting pads. By using the thermal solution suggested in the document, users can take full advantage of the exceptional performance features of Fairchild Semiconductor's latest Power MOSFET, including very low on-resistance and improved junction-to-case thermal resistance (RθJC). This ultimately leads to improved component performance and higher circuit board packing density.


Fairchild AN1026 Maximum Power Enhancement Techniques for SuperSOT-6 Power MOSFETs - cover page
Brand
Fairchild
Category
Other Electronics
Document type
Application Note
Language
English
Pages
12
File format
PDF
File size
221 KB
Published
12 July, 2012
Updated
28 September, 2023
MD5 checksum
0B7288D708F79A4682283E4415136531

About this manual

This document provides guidelines for maximizing the power handling capability of Fairchild Semiconductor's SuperSOT-6 Power MOSFETs. It focuses on improving thermal performance through the design of copper mounting pads on printed circuit boards (PCBs). The text explains that efficient thermal performance in smaller packages requires new methods to meliorate heat flow, specifically by utilizing the copper pad as a heatsink to reduce junction-to-case thermal resistance.

What's inside

  • Introduction
  • Theory
  • Result
  • Conclusion
  • SuperSOT-6 Thermal Board Top View
  • SuperSOT-6 Thermal Board Bottom View
  • Heat Flow Theory Applied to Power MOSFETs

Specifications

Junction-to-case thermal resistance (dual devices)60°C/W

Frequently asked questions

What is the recommended copper pad area for maximum performance?

It is recommended to put extra copper on the bottom of the board connected to the top pad by through-hole thermal vias.

What is the maximum power dissipation for a single SuperSOT-6 device using layout 2?

A copper pad of 0.01 square inches on the top side achieves approximately 0.9W.

How much does increasing the copper pad area from 0.003 to 0.4 square inches reduce thermal resistance?

The junction-to-ambient thermal resistance lowers from approximately 160°C/W to 90°C/W.

What is the junction-to-case thermal resistance for a single SuperSOT-6 device?

The package achieves a junction-to-case thermal resistance of 30°C/W.

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