AMD Athlon 64 and Opteron ccNUMA Multiprocessor Systems Performance Guidelines Application Note

About this manual

This document serves as an application note detailing performance guidelines for AMD Athlon 64 and AMD Opteron ccNUMA multiprocessor systems. It explains the cache coherent Non-Uniform Memory Access (ccNUMA) architecture and how it overcomes performance bottlenecks found in traditional symmetric multiprocessing (SMP) systems. The text highlights that while operating systems handle basic scheduling transparently, advanced developers can utilize specific tools and techniques for performance tuning.

What's inside

• Introduction
• Experimental Setup
• Scheduling Threads
• Data Locality Considerations
• Avoid Cache Line Sharing
• Common Hop Myths Debunked
• Locks
• Parallelism Exposed by Compilers
• Conclusions
• Tools and APIs for Thread/Process and Memory Placement

Frequently asked questions

What performance questions does this document address for AMD Athlon 64 and Opteron systems?

The document addresses where threads or processes should be scheduled and where memory should be allocated.

What factors influence performance in addition to memory latency and bandwidth?

Performance is also influenced by remote memory access latency, cache coherence maintenance latency, HyperTransport link bandwidth, and buffer queue lengths.

What type of test was used for the empirical analysis presented?

The analysis is based on data provided by running a multi-threaded synthetic test.