This document describes the product specification of the 74F280B 9-bit odd/even parity generator/checker. The IC features high-impedance NPN base inputs for reduced loading, buffered inputs, and easy word length expansion by cascading. It is commonly used for error detection in high-speed data transmission or retrieval systems. The IC provides both even and odd parity outputs for generating or checking parity on up to 9 bits. Expansion to larger word sizes can be achieved by connecting the even parity outputs of multiple parallel devices to the data inputs of the final stage. The IC operates at industrial temperature range and has a fast propagation delay and low supply current.
The Philips 74F280B is a 9-bit parity generator or checker designed to detect errors in high-speed data transmission or data retrieval systems. It features high-impedance NPN base inputs for reduced loading and buffered inputs. The device provides both Even (Y) and Odd (Xo) parity outputs, allowing it to generate or check even or odd parity on up to 9 bits. Expansion to larger word sizes is accomplished by cascading up to nine parallel devices.
| Word length | 9-bit |
|---|---|
| Propagation delay (Typ) | 5.5ns |
| Supply current (Typ) | 26mA |
| Operating temperature (Industrial) | -40°C to +85°C |
Both Even (Y) and Odd (Xo) parity outputs are available for generating or checking even or odd parity.
The absolute maximum rating for the supply voltage (Vcc) is +7.0 V.
This device checks parity on up to 9 bits.
The typical propagation delay is 5.5 ns when Vcc = 5V and Tamb = 25°C.