The 74HC/HCT139 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC/HCT139 are high-speed, dual 2-to-4 line decoder/multiplexers. This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable can be used as the data input for a 1-to-4 demultiplexer application.
The 74HC/HCT139 is a high-speed Si-gate CMOS device that functions as a dual 2-to-4 line decoder/demultiplexer. It features two independent decoders, each accepting two binary weighted inputs and providing four mutually exclusive active LOW outputs.
This integrated circuit is pin compatible with low power Schottky TTL (LSTTL) and complies with JEDEC standard no. 7A. The device includes an active LOW enable input that forces every output HIGH when activated, allowing it to be used as a data input for demultiplexer applications.
When the enable input is HIGH, every output is forced to a HIGH state.
The enable input must be at a LOW voltage level for the decoder to function.
This device contains two independent 2-to-4 line decoders.