74HC/HCT138 is a 3-to-8 line decoder/demultiplexer with inverting function and mutually exclusive low level outputs
The document describes the 74HC/HCT138 integrated circuit, which functions as a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL. It features three binary weighted address inputs and provides eight mutually exclusive active LOW outputs when enabled.
Key characteristics include demultiplexing capability, multiple input enable for easy expansion into larger decoders (such as 1-of-32), and standard output capability. The datasheet details the pin configuration, logic symbols, functional diagrams, truth tables, and AC/DC performance parameters including propagation delay and transition times.
| Device Type | 3-to-8 line decoder/demultiplexer; inverting |
|---|---|
| Technology | high-speed Si-gate CMOS |
| Pin Compatibility | low power Schottky TTL (LSTTL) |
| Output Capability | standard |
| IC Category | MSI |
| Address Inputs | three binary weighted (Ao, A1, Az) |
| Outputs | 8 mutually exclusive active LOW (Yo to Y7) |
The device features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
Yes, it is described as ideal for this application due to its demultiplexing capability.
It allows easy parallel expansion of the '138' to a 1-of-32 (5 lines to 32 lines) decoder with just four '138' ICs and one inverter.