The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The HC/HCT126 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a HIGH impedance OFF-state.
The document describes the 74HC/HCT126 as high-speed Si-gate CMOS devices that are pin compatible with low power Schottky TTL (LSTTL). These integrated circuits function as four non-inverting buffers or line drivers featuring 3-state outputs controlled by an active HIGH output enable input.
| Output capability | bus driver |
|---|---|
| Logic category | MSI |
| Input capacitance | 3.5 pF |
| Propagation delay (typical) | 19 ns (HC) / 11 ns (HCT) |
| Supply voltage range | -40 to +85 °C (HC), -40 to +125 °C (HCT) |
The '126' model is identical to the '125' but has active HIGH enable inputs.
It contains four non-inverting buffer/line drivers.