The THS1007 is a low-power, 10-bit, 6 MSPS analog-to-digital converter (ADC) that is suited for applications in radar, imaging, high-speed acquisition, and communications. It features a multistage pipelined architecture with output error correction logic that provides for no missing codes over the full operating temperature range. Internal control registers are used to program the ADC into the desired mode. The THS1007 consists of four analog inputs, which are sampled simultaneously. These inputs can be selected individually and configured to single-ended or differential inputs. Internal reference voltages for the ADC (1.5 V and 3.5 V)
The THS1007 is a CMOS, low-power, 10-bit, 6 MSPS analog-to-digital converter (ADC) designed for applications in radar, imaging, high-speed acquisition, and communications. It features simultaneous sampling of four single-ended signals or two differential signals, along with internal voltage references and a glueless DSP interface.
| Resolution | 10 Bits |
|---|---|
| Sampling Rate | 6 MSPS |
| Signal-to-Noise and Distortion Ratio | 59 dB at f= 2 MHz |
| Integral Nonlinearity Error | +1 LSB |
| Differential Nonlinearity Error | +1 LSB |
| Max Power Dissipation | 216 mW at 5 V |
Yes, it supports simultaneous sampling of 4 Single-Ended Signals or 2 Differential Signals or a combination of both.
The device dissipates a maximum of 216 mW when operating with AVpp = DVpp = 5 V and BVpp = 3.3 V.
The reference output requires a capacitor of 10 uF connected to AGND for filtering and stability.