PRELIMINARY FTG for Integrated Core Logic with 133-MHz FSB W228B is a product of Cypress Semiconductor Corporation. It uses Cypress's Spread Spectrum technology to maximize EMI suppression. It provides two CPU clocks with frequencies of 66/100/133 MHz. It provides 12 100 MHz SDRAM clocks. It provides a PCI clock. It provides an APIC clock with a frequency of 33 MHz, which is synchronized to the CPU clock. It provides two 48-MHz clocks (non-Spread Spectrum), optimized for USB reference input and video dot clock. It provides three 3V 66-MHz fixed clocks. It provides a 14.31818-MHz reference clock. It provides power down control. It provides an I2C™ interface for turning off unused clocks.
The document is a Preliminary Functional Test Guide (FTG) for the Cypress Semiconductor Corporation FSBW228B Integrated Core Logic chip. It serves as a technical reference for system designers and developers, outlining the device's primary functions, clock configurations, performance specifications, and pin definitions.
| CPU Clock Frequencies | 66/100/133 MHz |
|---|---|
| SDRAM Clock Copies | Twelve copies of 100 MHz |
| PCI Clock Copy | One copy |
| APIC Clock Frequency | 33 MHz |
| Fixed Clock Frequency | 3V 66-MHz |
| Reference Clock Frequency | 14.31818-MHz |
| CPU to SDRAM Skew (133 MHz) | ±0.5 ns |
The device supports CPU clocks at 66, 100, or 133 MHz depending on configuration.
The chip provides twelve copies of the 100 MHz SDRAM clocks.
Yes, an I2C interface is available for turning off unused clocks and individually disabling specific outputs.