SST 2 Mbit 4 Mbit 8 Mbit (x16) Multi-Purpose Flash SST39LF200A SST39LF400A SST39LF800A SST39VF200A SST39VF400A SST39VF800A Data Sheet1(1)

This document describes the features and characteristics of Silicon Storage Technology's products, including device organization, single voltage read and write operations, superior reliability, low power consumption, sector-erase and block-erase capabilities, fast read access time, latched address and data, fast erase and word-program, automatic write timing, end-of-write detection, CMOS I/O compatibility, JEDEC standard, and available packages.


SST 2 Mbit 4 Mbit 8 Mbit (x16) Multi-Purpose Flash SST39LF200A SST39LF400A SST39LF800A SST39VF200A SST39VF400A SST39VF800A Data Sheet1(1) - cover page
Brand
SST
Category
Memory
Document type
Datasheet
Language
English
Pages
30
File format
PDF
File size
324 KB
Published
07 June, 2012
Updated
29 September, 2023
MD5 checksum
79FEBC941B2D5CC156D90AB8729AC95A

About this manual

This document is a technical data sheet for the SST39LF200A/400A/800A and SST39VF200A/400A/800A series of Multi-Purpose Flash (MPF) memory devices. Manufactured using Silicon Storage Technology's proprietary SuperFlash technology, these chips are organized as 128K x16, 256K x16, or 512K x16.

What's inside

  • Features
  • Product Description
  • Device Operation
  • Read Operation
  • Word-Program Operation
  • Sector/Block-Erase Operation
  • Chip-Erase Operation
  • Write Operation Status Detection

Specifications

Organization128K x 16 / 256K x 16 / 512K x 16
Voltage Range (LF Series)3.0-3.6V
Voltage Range (VF Series)2.7-3.6V
Endurance100,000 Cycles (typical)
Data RetentionGreater than 100 years
Active Current20 mA (typical)
Sector-Erase Time18 ms (typical)

Frequently asked questions

What is the typical Word-Program time?

The devices provide a typical Word-Program time of 14 usec.

Which packages are available for these flash devices?

They are offered in both 48-lead TSOP and 48-ball TFBGA packages.

How is the Chip-Erase operation initiated?

It is initiated by executing a six-byte command sequence with Chip-Erase command (10H) at address 5555H.

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