IDT IDT71V35761S IDT71V35781S IDT71V35761SA IDT71V35781SA handbook

This document introduces the features and characteristics of IDT71V35761/781 high-speed SRAM, including 128K x 36/256K x 18 memory configurations, high system speed, LBO input selection, self-timed write cycle, etc.


IDT IDT71V35761S IDT71V35781S IDT71V35761SA IDT71V35781SA handbook - cover page
Brand
IDT
Category
Memory
Document type
Datasheet
Language
English
Pages
22
File format
PDF
File size
283 KB
Published
05 June, 2012
Updated
30 September, 2023
MD5 checksum
D940B6EA56A2023DA835F823CBACB5A2

About this manual

This document describes the IDT71V35761 and IDT71V35781, which are 3.3V Synchronous SRAMs organized as 128K x 36 or 256K x 18. These devices feature pipelined outputs, a burst counter for high system speed, and support both commercial and industrial temperature ranges.

What's inside

  • Features
  • Description
  • Pin Description Summary
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Capacitance
  • Pin Configuration

Specifications

Memory Organization128K x 36, 256K x 18
Operating Voltage (Core)3.3V ±5%
Commercial Temperature Range0°C to +70°C
Industrial Temperature Range-40°C to +85°C
Max Clock Access Time (Commercial)3.1ns

Frequently asked questions

What are the memory configurations for these SRAMs?

The devices come in two specific memory configurations: 128K x 36 and 256K x 18.

What is the maximum clock access time for commercial grade parts?

Commercial grade SRAMs have a maximum clock access time of 3.1ns.

What is the voltage range for the core power supply?

The core supply voltage must be between 3.135V and 3.465V.

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