Update: 30 September, 2023
IDT72V3686/96/106 3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING, is an integrated circuit product produced by IDT company. It has the following features: 1. Storage capacity: IDT72V3686 - 16,384 x 36 x 2 IDT72V3696 - 32,768 x 36 x 2 IDT72V36106 - 65,536 x 36 x 2 2. Clock frequency: up to 100MHz (6.5ns access time) 3. Independent FIFO buffers can be used between a bidirectional 36-bit port and two unidirectional 18-bit ports (Port C receives and Port B transmits) 4. Supports 18-bit (word) and 9-bit (byte) bus sizing, 18 bits (word) on Ports B and C 5. Select IDT Standard Timing (using EFA, EFB, FFA, and FFC flag functions) or First Word Fall Through Timing (using ORA, ORB, IRA, and IRC flag functions) 6. Programmable Almost-Empty and Almost-Full flags, each with five default offsets (8, 16, 64, 256, and 1024) 7. Serial or parallel programming of partial flags 8. Big- or Little-Endian format for word and byte bus sizes 9. Loopback mode on Port A 10. Retransmit Capability 11. Master Reset clears data and configures FIFO, Partial Reset clears data but retains configuration settings 12. Mailbox bypass register
File format: PDF
Size: -
MD5 Checksum: C90F21F91A591261ABAE3072D3328B1D
Publication date: 05 June, 2012
Downloads: -
PDF Link: IDT IDT72V3686 IDT72V3696 IDT72V36106 handbook PDF