This document provides preliminary information on a new product, which is a Flash In-System Programmable (ISP) peripheral for 8-bit MCUs. It features single supply voltage, primary and secondary flash memory, SRAM, PLD, reconfigurable I/O ports, enhanced JTAG serial port, programmable power management, and more.
The PSD9XX family (PSD913F2, PSD934F2, PSD954F2) offers configurable memory systems for 8‑bit microcontrollers, featuring up to 2 Mbit of primary flash, a secondary 256 Kbit flash, up to 256 Kbit SRAM, over 2,000 PLD gates, and 27 reconfigurable I/O ports. Power supply options include 5 V ±10% and 3.3 V ±10% versions.
Programming can be performed in‑system via an IEEE‑1149.1 compliant JTAG interface (ISP) or in‑application using the MCU (IAP). The devices include a programmable power‑management unit with automatic power‑down, high endurance flash (100 k erase/write cycles), and PLD endurance of 1 k cycles, making them suitable for flexible embedded designs.
| Single Supply Voltage (3.3 V version) | 3.3 V ±10% |
|---|---|
| Primary Flash Memory | Up to 2 Mbit |
| Secondary Flash Memory | 256 Kbit |
| SRAM | Up to 256 Kbit |
| Programmable Logic Gates | Over 2,000 gates |
| Flash Endurance | 100,000 erase/write cycles (minimum) |
| PLD Endurance | 1,000 erase/write cycles (minimum) |
| Data Retention | 15 years |
| Standby Current (5 V devices) | as low as 50 µA |
The devices support In‑System Programming via a JTAG interface and In‑Application Programming using the host microcontroller.
The flash memory is guaranteed for a minimum of 100,000 erase/write cycles.
Each device provides up to 2 Mbit of primary flash memory.