PHILIPS PCK2509SL Manual

Update: 28 September, 2023

The PCK2509SL is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.


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MD5 Checksum: 06DDAAD83AE35CFD3693F8DB82E7F6F5

Publication date: 01 June, 2012

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PDF Link: PHILIPS PCK2509SL Manual PDF

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