The DS1000 series delay lines have five equally spaced taps providing delays from 4 ns to 500 ns. These devices are offered in a standard 14-pin DIP that is pin-compatible with hybrid delay lines. Alternatively, 8-pin DIPs and surface mount packages are available to save PC board area. Low cost and superior reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and industry standard DIP and SOIC packaging. In order to maintain complete pin compatibility, DIP packages are available with hybrid lead configurations. The DS1000 series delay lines provide a nominal accuracy of ±5% or ±2 ns, whichever is greater. The DS1000 5-Tap Silicon Delay Line reproduces the input logic state at the output after a fixed delay as specified by the extension of the part number after the dash. The DS1000 is designed to reproduce both leading and trailing edges with equal precision. Each tap is capable of driving up to ten 74LS loads. Dallas Semiconductor can provide custom delays to meet specific application requirements.
The DS1000 series is an all‑silicon 5‑tap delay line offering precise, stable delays from 4 ns to 500 ns. It is low‑power CMOS, TTL/CMOS‑compatible and available in DIP and SOIC packages.
The datasheet lists features, pin assignments, logic diagrams, a full delay‑tap table, DC and AC electrical characteristics, capacitance data, timing diagrams, test circuitry, terminology and test conditions for designers and engineers.
| Number of taps | 5 |
|---|---|
| Delay tolerance | ±5% or ±2 ns, whichever is greater |
| High Level Input Voltage (VIH) typical | 2.2 V |
It has five equally spaced taps.
The delay tolerance is ±5 % or ±2 ns, whichever is greater.