The DS1010 series delay line has ten equally spaced taps providing delays from 5 ns to 500 ns. It is an all-silicon solution, with stable and precise delays. The delay tolerance is ±5% or ±2 ns, whichever is greater. It is economical and low-power CMOS, compatible with TTL/CMOS. It can be easily soldered using vapor phase, IR, and wave soldering methods. Custom delays are also available. The DS1010 is designed to produce both leading and trailing edge with equal precision. Each tap can drive up to 10 74LS type loads. Dallas Semiconductor offers customization options and fast delivery.
The DS1010 series provides ten equally spaced taps with stable, precise delays ranging from 5 ns to 500 ns. It is offered in a standard 14‑pin DIP package or a 16‑pin SOIC for surface‑mount applications, and supports both TTL and CMOS logic levels.
The datasheet includes full pin assignments, timing diagrams, absolute maximum ratings, DC and AC electrical characteristics, and test setup information, allowing designers to integrate the device into a wide range of timing and delay applications.
| Number of taps | 10 taps equally spaced |
|---|---|
| Delay range | 5 ns to 500 ns |
| Package options | 14‑pin DIP, 16‑pin SOIC |
| Supply voltage | 5 V ±5% (4.75‑5.25 V) |
| High‑level input voltage (VIH) | 2.2 V + 0.5 V |
| Low‑level input voltage (VIL) | -0.5 V to 0.8 V |
| Short‑circuit output current | 50 mA for 1 s |
| Operating temperature range | 0 °C to 70 °C |
| Input capacitance | 51 pF typical |
The DS1010 provides delays from 5 ns to 500 ns.
It has ten equally spaced taps.
The device is offered in a standard 14‑pin DIP or a 16‑pin SOIC package.
It operates from a 5 V supply with a tolerance of ±5% (4.75 V to 5.25 V).