M5M29KE131BVP is a 134,217,728-BIT (16,777,216-WORD BY 8-BIT / 8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY Stacked-uMCP (micro Multi Chip Package) produced by Renesas LSIs
This document describes the M5M29KE131BVP stacked micro‑Multi Chip Package (uMCP) flash memory, a 128‑Mbit CMOS device intended for high‑performance cellular phones, PDAs, car navigation systems and similar applications. It outlines the memory organization, voltage requirements, power modes, and the command set used to read, program, and erase the memory.
Key features include a 48‑pin TSOP package, 3.0‑3.6 V supply range, fast random access (70 ns max) and page read (25 ns max), low power consumption modes, and support for up to 100 k program/erase cycles. The datasheet also details the pin configuration, block organization, and software command definitions for various operations such as page program, block erase, and suspend/resume.
| Memory size | 128 M‑bit (16,777,216 bytes / 8,388,608 words) |
|---|---|
| Supply voltage (VCC) | 3.0 V ~ 3.6 V |
| Random access time | 70 ns (max) |
| Random page read time | 25 ns (max) |
| Read power consumption | 108 mW (max at 5 MHz) |
| Program/Erase power consumption | 126 mW (max) |
| Standby power consumption | 0.66 µW typ |
| Deep Power‑Down power consumption | 0.66 µW typ |
| Word program time | 30 µs typ |
| Page program time | 4 ms typ |
| Erase time | 150 ms typ |
| Program/Erase cycles | 100 k cycles |
The device operates with a supply voltage (VCC) between 3.0 V and 3.6 V.
Random access time is up to 70 ns (maximum).
The memory supports up to 100 000 program/erase cycles.