This datasheet provides detailed information on MBM29PL160TD-75/-90/MBM29PL160BD-75/-90's features and functions, such as single 3.0 V read, program and erase, compatibility with JEDEC standard commands, compatibility with MASK ROM pinouts, minimum 100,000 program/erase cycles, high performance 25 ns maximum page access time (75ns maximum random access time), 8 words page read mode function, sector erase architecture, embedded erase algorithms, embedded program algorithms, data polling and toggle bit feature, Ready/Busy output (RY/BY) hardware method, automatic sleep mode and low VCC write inhibit.
The MBM29PL160TD/BD is a 16‑Mbit (2 M‑byte) flash memory device that operates from a single 3.0 V supply. It is offered in 48‑pin TSOP and 44‑pin SOP packages and is compatible with JEDEC‑standard E7PROM commands. The device supports fast access times, with a 25 ns maximum page access time and 75 ns (TD) or 90 ns (BD) address access time.
Key features include a flexible sector‑erase architecture, embedded erase and program algorithms, low‑Vcc write inhibit, and a ready/busy output. Detailed pin configurations, bus operation tables, and connection diagrams are provided for system integration.