MB85RS256 is a 256K (32K × 8) bit SPI FRAM chip, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. It has high endurance and data retention capability, suitable for applications without the need for a backup battery.
The MB85RS256 is a ferroelectric RAM (FRAM) chip organized as 32,768 × 8 bits. It uses a CMOS process and provides non‑volatile storage without a backup battery. The device operates from 3.0 V to 3.6 V, supports SPI mode 0 and mode 3, and can run at up to 15 MHz. It offers a data retention of 10 years at +55 °C and a minimum endurance of 10 billion read/write cycles.
The chip is supplied in an 8‑pin plastic SOP package (FPT‑8P‑M02) with a lead pitch of 1.27 mm. Pin functions include Chip Select, Serial Clock, Serial Data Input/Output, Write Protect, Hold, VDD and VSS. The datasheet provides block diagrams, pin assignments, SPI timing details, command op‑codes, and status register definitions for designers integrating the memory into their systems.
| Bit configuration | 32,768 × 8 bits |
|---|---|
| Operating voltage | 3.0 V to 3.6 V |
| Maximum SPI frequency | 15 MHz |
| SPI modes supported | Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1) |
| Operating temperature range | -20 °C to +85 °C |
| Data retention | 10 years (at +55 °C) |
| Endurance | ≥10 billion read/write cycles |
| Package type | 8‑pin plastic SOP (FPT‑8P‑M02) |
| Lead pitch | 1.27 mm |
| Package dimensions | 3.9 mm × 5.05 mm (width × length) |
The device operates from 3.0 V to 3.6 V.
Data can be retained for 10 years at +55 °C.
The maximum SPI clock frequency is 15 MHz.
It is supplied in an 8‑pin plastic SOP package (FPT‑8P‑M02).