The SD1424 is a gold metallized epitaxial silicon NPN planar transistor using diffused emitter ballast resistors for high linearity Class AB operation in cellular base station application.
The SD1424 is a gold‑metallized epitaxial silicon NPN planar transistor designed for 800‑900 MHz base‑station applications. It operates in a common‑emitter, Class AB configuration with internal input matching and a typical output power of 30 W.
Key specifications include a collector‑base voltage of 48 V, collector‑emitter voltage of 45 V, and a maximum device current of 4 A. Thermal data show a junction‑case resistance of 2.0 °C/W and a junction temperature limit of +200 °C. Mechanical dimensions and recommended test‑circuit layouts are also provided.
| Collector‑Base Voltage (VcBo) | 48 V |
|---|---|
| Collector‑Emitter Voltage (VcEs) | 45 V |
| Emitter‑Base Voltage (VEBO) | 4.0 V |
| Device Current (Ic) | 4 A |
| Power Dissipation (Ppoiss) | 87.5 W |
| Junction Temperature (Tj) | +200 °C |
| Junction‑Case Thermal Resistance (Rth(j‑c)) | 2.0 °C/W |
The maximum collector‑base voltage is 48 V.