Update: 29 September, 2023
The MACH 5 CPLD Family Fifth Generation MACH Architecture is a logic integrated circuit product with high logic density and input/output interfaces to support various application needs. It also features high-performance characteristics, flexible architecture design for convenient logic design and system integration. It supports advanced capabilities such as boundary scan testing and programmable security bit. It is based on advanced E2CMOS process, providing high-performance and cost-effective solutions.
File format: PDF
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MD5 Checksum: 86E278DAD5C3B8F5D9645F71E62F59E5
Publication date: 07 May, 2012
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PDF Link: Lattice MACH 5 CPLD Family Fifth Generation MACH Architecture PDF