Key facts
- Brand
- Lattice
- Model
- MACH 5 CPLD
- Category
- Other Electronics
- Documents
- 2
- Languages
- EN
- Last added
- 2012-05-10
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Lattice MACH5 CPLD Family User Manual
The manual introduces the MACH® 5 family of high‑density CPLDs, describing its hierarchical architecture, macrocell counts (up to 512), and I/O options ranging from 120 to 256 pins. It covers power‑management features, IEEE 1149.1 boundary‑scan compliance, and PCI speed‑grade support.
Technical sections provide detailed tables of device features, speed grades, package options, and functional block diagrams, along with explanations of macrocells, clock generators, set/reset logic, and output‑enable circuitry.
Lattice MACH 5 CPLD specifications
| Supply Voltage | 3.3 V and 5 V |
|---|---|
| Macrocells | 128 – 512 |
| Maximum User I/O Pins | 120 – 256 |
| Typical Static Power | 35 – 100 mA |
| Maximum Operating Frequency | 182 MHz (some devices 167 MHz) |
| IEEE 1149.1 Boundary Scan | Yes |
| PCI‑Compliant | Yes |
All Lattice MACH 5 CPLD documents by type
Day-to-day operation, settings and troubleshooting. Start here if the product is already set up.
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What supply voltages are supported by MACH5 devices?
MACH5 devices operate at either 3.3 V or 5 V.
Are MACH5 devices IEEE 1149.1 boundary‑scan compliant?
Yes, all MACH5 devices are IEEE 1149.1 boundary‑scan compliant.
What supply voltages are available for MACH 5 devices?
MACH 5 devices are offered in 5‑V (M5‑xxx) and 3.3‑V (M5LV‑xxx) versions.
From: Lattice MACH 5 CPLD Family Fifth Generation MACH Architecture Datasheet
Are MACH 5 devices IEEE 1149.1 boundary‑scan compliant?
Yes, MACH 5 devices include IEEE 1149.1 boundary‑scan registers and are compliant with the standard.
From: Lattice MACH 5 CPLD Family Fifth Generation MACH Architecture Datasheet