This data sheet provides detailed information about the MAX 7000A Programmable Logic Device, including features, functions, models, and packages.
The MAX 7000A family are high‑performance, 3.3‑V EEPROM‑based programmable logic devices offering 600 to 10,000 usable gates. They support in‑system programmability via JTAG, hot‑socketing, and a range of voltage‑compatible I/O options.
The datasheet details device features such as macrocell architecture, pin‑to‑pin delays as low as 4.5 ns, maximum operating frequencies up to 227.3 MHz, and a variety of package options including PLCC, BGA, FineLine BGA, Ultra FineLine BGA, PQFP and TQFP. Revision history, programming sequences, and electrical specifications are also included.
| Usable gates | 600‑10,000 |
|---|---|
| Macrocells | 32‑512 |
| Maximum user I/O pins | 36‑164 |
| Pin‑to‑pin delay (tpp) | 4.5‑75 ns |
| Maximum operating frequency (fonr) | 116.3‑227.3 MHz |
| Supply voltage | 3.3 V |
| Programming/erase cycles | up to 100 times |
| Package types | PLCC, BGA, FineLine BGA, Ultra FineLine BGA, PQFP, TQFP |
They operate with a 3.3‑V supply voltage.
Each device can be programmed and erased up to 100 times.
Packages include PLCC, BGA, FineLine BGA, Ultra FineLine BGA, PQFP, and TQFP.
The devices can run at frequencies up to 227.3 MHz.