Altera MAX 7000 Programmable Logic Device Family Data Sheet

MAX 7000 is a high-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture.


Altera MAX 7000 Programmable Logic Device Family Data Sheet - cover page
Brand
Altera
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
62
File format
PDF
File size
1.1 MB
Published
05 June, 2012
Updated
30 September, 2023
MD5 checksum
F4DB24E3ADE23BF2D2FA677E9B242BB5

About this manual

The document describes the Altera MAX 7000 family of high-density, high-performance Programmable Logic Devices (PLDs). These devices are based on second-generation MAX architecture and utilize CMOS EEPROM technology to implement logic functions. The family includes standard MAX 7000 devices with densities ranging from 600 to 5,000 usable gates, as well as enhanced MAX 7000E and in-system programmable (ISP) MAX 7000S variants.

What's inside

  • Device Features
  • Speed Grades
  • Functional Description
  • Architecture Elements
  • Logic Array Blocks
  • Macrocells
  • Packages
  • Development Support

Specifications

Usable gates range600 to 5,000
Macrocells per device32 to 256
Pin-to-pin logic delaysas fast as 5 ns
Programming enduranceup to 100 times

Frequently asked questions

What is the usable gate range for MAX 7000 devices?

The family provides logic densities ranging from 600 to 5,000 usable gates.

Can MAX 7000 devices be reprogrammed?

Yes, they can be programmed and erased up to 100 times for design iterations.

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